This paper introduces a novel 32-bit microprocessor, based on the RISC-V instruction set architecture, is designed,utilising a dynamic clock source to achieve high efficiency, overcoming the limitations of hardware delays. In addition, the microprocessor is also aimed to operate with both base (32-bit) instructions and 16-bit compressed instructions. The testing of the design is carried out using ModelSim with an ideal result.

本文介绍了一种基于RISC-V的新型32位微处理器 设计了指令集体系结构，利用动态时钟源 实现高效率，克服硬件延迟的限制。在……里面 此外，微处理器的目标也是在两个基本(32位)下运行 指令和16位压缩指令。该设计的测试是 利用ModelSim进行仿真，取得了较理想的效果。